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【獵頭職位：上海需要一位 Analog IC Layout Engineer】聯(lián)系人：David-Chen，郵箱：hr@kthr.com，微信也可查詢職位啦！打開手機微信，搜號碼“KTHR_COM”或查找微信公眾帳號“KT人才”或掃描以上二維碼即可添加，歡迎大家關(guān)注！ Job description： Perform block level analog layout, including Bandgap, PLL, LDO, OPAMP, ADC/DAC； Perform verification (LVS/DRC/ANT etc) of layout； Assist in top level layout. Requirement： BSEE or related engineering degree； 2+ years CMOS IC custom layout experience； Familiar with Cadence and Calibre design flow； Experience in basic analog block layout is a plus； Team working skill is a plus. |
