數(shù)字VLSI芯片設(shè)計(jì)圖書：Digital VLSI Chip Design with Cadence and Synopsys CAD Tools
KEY BENEFIT: This hands-on book leads readers through the complete process of building a ready-to-fabricate CMOS integrated circuit using popular commercial design software. KEY TOPICS: The VLSI CAD flow described in this book uses tools from two vendors: Cadence Design Systems, Inc. and Synopsys Inc. Detailed tutorials include step-by-step instructions and screen shots of tool windows and dialog boxes. MARKET: A useful reference for chip designers. |
數(shù)字VLSI芯片設(shè)計(jì)——使用Cadence和Synopsys CAD工具(英文版).part1.rar
8.3 MB, 下載積分: 積分 -1
數(shù)字VLSI芯片設(shè)計(jì)——使用Cadence和Synopsys CAD工具(英文版).part2.rar
5.31 MB, 下載積分: 積分 -1
| thanks |
| 謝謝分享 |
  |
| 現(xiàn)在網(wǎng)速比較慢，大家可以在等待下載樓主文件的同時(shí)，去eepeople網(wǎng)站上瀏覽一下吧，看看有沒(méi)有適合自己的職位，比如設(shè)備工程師 、人事經(jīng)理 、汽車電子高級(jí)工程師等等，來(lái)自世界知名電子企業(yè)，大家可以去看看。 |
 |
| ding |
| xiexie，書太舊了 |
| thanks for sharing! |
| the publication year please! nowadays, you cannot just use Cadence and Synopsys tools to design an ASIC would be manufactured in modern technology. |
| Great book!! Thanks!! |
| thanks |
| thanks for sharing! |
| 好書。。 |
| 書的內(nèi)容與我看到的《數(shù)字vlsi 芯片設(shè)計(jì)--使用cadence 和synopsys CAD 工具》-電子工業(yè)出版社 Erik Brunvand 著,有所出入，少了一些章節(jié)。。 |
| thanks for sharing! |
| thanks a lot |
| 少第2章。 |
| 書的內(nèi)容與我看到的《數(shù)字vlsi 芯片設(shè)計(jì)--使用cadence 和synopsys CAD 工具》-電子工業(yè)出版社 Erik Brunvand 著,有所出入，少了一些章節(jié) |
|
好書：Digital VLSI Chip Design with Cadence and Synopsys CAD Tools 好書：Digital VLSI Chip Design with Cadence and Synopsys CAD Tools |
