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Infineon公司的XMC4500是基于ARM Cortex-M4處理器核的XMC4000系列MCU一員, 具有高性能和能效的微控制器,工作溫度高達125 ℃,具有16位和32Thumb2指令集,DSP/MAC指令,具有浮點單元和存儲器保護單元,適合用于工業(yè)連接,工業(yè)控制,電源轉(zhuǎn)換,傳感和控制.本文介紹了XMC4500主要特性,方框圖,以及通用板CPU_45A－V2主要特性,方框圖,電路圖,材料清單和PCB元件布局圖. The XMC4000 family marks a cornerstone in microcontroller design for real-time critical systems. It is the result of Infineon’s world-leading microcontroller know-how now coupled with all the benefits of a standard CPU core. Featuring Infineon’s powerful peripheral set, configurable to specific application requirements, XMC4000 is the ultimate choice for today’s industrial control solutions. This family is designed to tackle the imminent challenges of improving energy efficiency, supporting advanced communication protocols, and reducing time-to-market. Striving for energy-efficient it greatly benefits from Infineon’s well-known set of configurable peripherals, fast embedded Flash technology, high quality standards, long product life times, and the ability to provide high temperature ranges of up to 125 ℃, backed by Infineon’s background as a leading supplier to automotive markets. XMC4500, the first product generation of the XMC microcontroller family, delivers the brainpower for a variety of industrial applications facing high innovation pressure at decreasing development cycle times. It is dedicated to enable highly energy-efficient products with industrial interconnection capabilities. The XMC4500 devices are members of the XMC4000 family of microcontrollers based on the ARM Cortex-M4 processor core. The XMC4000 is a family of high performance and energy efficient microcontrollers optimized for Industrial Connectivity, Industrial Control, Power Conversion, Sense & Control. 
圖1.XMC4500系統(tǒng)方框圖 XMC4500主要特性: CPU Subsystem • CPU Core – High Performance 32-bit ARM Cortex-M4 CPU – 16-bit and 32-bit Thumb2 instruction set – DSP/MAC instructions – System timer (SysTick) for Operating System support • Floating Point Unit • Memory Protection Unit • Nested Vectored Interrupt Controller • Two General Purpose DMA with up-to 12 channels • Event Request Unit (ERU) for programmable processing of external and internalservice requests • Flexible CRC Engine (FCE) for multiple bit error detection On-Chip Memories • 16 KB on-chip boot ROM • 112 KB on-chip high-speed program memory • 64 KB on-chip high speed data memory • 32 KB on-chip high-speed communication • 1024 KB on-chip Flash Memory with 4 KB instruction cache Communication Peripherals • Ethernet MAC module capable of 10/100 Mbit/s transfer rates • Universal Serial Bus, USB 2.0 host, Full-Speed OTG, with integrated PHY • Controller Area Network interface (MultiCAN), Full-CAN/Basic-CAN with 3 nodes, 64 message objects, data rate up to 1MBit/s • Six Universal Serial Interface Channels (USIC),providing 6 serial channels, usable as UART, double-SPI, quad-SPI, IIC, IIS and LIN interfaces • LED and Touch-Sense Controller (LEDTS) for Human-Machine interface • SD and Multi-Media Card interface (SDMMC) for data storage memory cards • External Bus Interface Unit (EBU) enabling communication with external memories and off-chip peripherals Analog Frontend Peripherals • Four Analog-Digital Converters (VADC) of 12-bit resolution, 8 channels each, with input out-of-range comparators • Delta Sigma Demodulator with four channels, digital input stage for A/D signal conversion • Digital-Analogue Converter (DAC) with two channels of 12-bit resolution Industrial Control Peripherals • Two Capture/Compare Units 8 (CCU8) for motor control and power conversion • Four Capture/Compare Units 4 (CCU4) for use as general purpose timers • Two Position Interfaces (POSIF) for servo motor positioning • Window Watchdog Timer (WDT) for safety sensitive applications • Die Temperature Sensor (DTS) • Real Time Clock module with alarm support • System Control Unit (SCU) for system configuration and control Input/Output Lines • Programmable port driver control module (PORTS) • Individual bit addressability • Tri-stated in input mode • Push/pull or open drain output mode • Boundary scan test support over JTAG interface On-Chip Debug Support • Full support for debug features: 8 breakpoints, CoreSight, trace • Various interfaces: ARM-JTAG, SWD, single wire trace Packages • PG-LFBGA-144 • PG-LQFP-144 • PG-LQFP-100 MC4000系列Hexagon 應(yīng)用套件 CPU XMC4500通用板CPU_45A-V2 CPU Board XMC4500 General Purpose(CPU_45A-V2) This document describes the features and hardware details of the CPU Board XMC4500 General Purpose (CPU_45A-V2) designed to work with Infineon‟s XMC4500 Microcontroller. This board is part of Infineon‟sHexagon Application Kits. The CPU_45A-V2 board houses the XMC4500 Microcontroller and three satellite connectors (HMI, COM, ACT) for application expansion. The board along with satellite cards (e.g. HMI_OLED-V1, COM_ETH-V1, AUT_ISOV1 boards) demonstrates the capabilities of XMC4500. The main use case for this board is to demonstrate the generic features of XMC4500 device including toolchain. The focus is safe operation under evaluation conditions. The board is not cost optimized and cannot be seen as reference design. 通用板CPU_45A-V2主要特性: The CPU_45A-V2 board is equipped with following features XMC4500 (ARM® Cortex™-M4) Microcontoller, LQFP-144 Connection to XMC4500 satellite cards via satellite connectors COM, HMI and ACT USB OTG Host/Device support via micro USB connector Debug options − Cortex Debug connector 10-pin (0.05”) −Cortex Debug+ETM connector 20-pin (0.05”) −DriveMonitor2 Stick connector Reset push button 32MBit quad SPI flash memory Boot from Embedded Flash, UART or CAN Ready for power consumption analysis 5 LED‟s 3 Power indicating LED‟s 1 GPIO (P3.9) LED 1 RESET LED Potentiometer, connected to analog input P14.1 Power supply − Via micro USB connector in USB device mode − Via satellite connector pins (COM/ACT satellites cards can supply power to CPU board) − RTC backup battery
圖2.CPU_45A-V2 板方框圖
圖3.CPU_45A-V2 通用板外形圖
圖4.CPU_45A-V2 通用板電路圖:衛(wèi)星式連接器, USB-OTG
圖5.CPU_45A-V2 通用板電路圖:XMC4500
圖6.CPU_45A-V2 通用板電路圖:電源,調(diào)試 CPU_45A-V2 通用板材料清單:
圖7.CPU_45A-V2 通用板PCB元件布局圖 詳情請見: http://www.infineon.com/dgdl/xmc4500_ds_v0_6_2012_02.pdf?folderId=db3a30433580b3710135a47f3eb76c98&fileId=db3a304335b504400135bdca7ed86742&sId=db3a3043372d5cc8013779e3e78154d0 和 http://www.infineon.com/dgdl/Board_Users_Manual_CPU_Board_XMC4500_General_Purpose_R1.0.pdf?folderId=db3a30433580b3710135a47f3eb76c98&fileId=db3a304335c2937a0135f1559c9e66c9&sId=db3a3044372d59c801377ccfdf70468c 來源：網(wǎng)絡(luò) |
